4 Replies Latest reply on Dec 4, 2014 4:20 PM by DaKn_263916

    Sticky bits

       Hello ALL


      I was going through the SPI datasheet and near TX and RX status register part i found this word "Sticky bits"


      What are sticky bits

        • 1. Re: Sticky bits

          Sticky bits keep their value when they changed to logical 1 as long until the status-register is read by the CPU. This is very important when the sticky bit is generating an interrupt, it has to be cleared within the isr. Otherwise the interrupt handling will not function properly.





          • 2. Re: Sticky bits

             Thanks, Bob. Clear and concise.

            • 3. Re: Sticky bits

              Alex, welcome in the forum and in the fascinating world of PSoCs!


              Nice to see that you found this two-year old post of mine ;-)


              Can I help you with something more actual?





              • 4. Re: Sticky bits

                From the TRM




                Sticky Status, with Clear on Read


                In this mode, the status register inputs are sampled on each
                cycle of the status and control clock. If the signal is high in a
                given sample, it is captured in the status bit and remains
                high, regardless of the subsequent state of the input. When
                the CPU or DMA reads the status register the bit is cleared.
                The status register clearing is independent of mode and
                occurs even if the UDB clock is disabled; it is based on the
                bus clock and occurs as part of the read operation.




                Regards, Dana.