It appears I did not pay enough attention to those pink pins. It seems these SIO pins are not able to be used as Analog Inputs.
Have to lay up my PCB again using all GPIO instead.
AN58304 covers dedicated routes, unfortunate not a table in datasheet calling attention
to this problem, like PSOC 4 datasheet.
http://www.cypress.com/?rID=57571 AN72382 - Using PSoC® 3 and PSoC 5LP GPIO Pins
http://www.cypress.com/?rID=39677 AN57821 - PSoC® 3, PSoC 4, and PSoC 5LP Mixed Signal Circuit Board Layout Considerations
http://www.cypress.com/?rID=40247 AN58827 - PSoC® 3 and PSoC 5LP Internal Analog Routing Considerations
http://www.cypress.com/?rID=39974 AN58304 - PSoC® 3 and PSoC 5LP – Pin Selection for Analog Designs
I agree. Though I were aware of SIO pins, I did not realize initially they cannot be used for Analog inputs. I just assumed that had stronger drive capability.
It was a shock to lay up the schematic and then when on the pins page, the port pins did not even appear in the pull down list (not even grayed out - which would have indicated the pins are there but not available).
It wasn't until I went specifically looking for a reason I could not select them that I found the answer in the Pins app note.
A "LEGEND" in the PINS view of Creator would be excellent. I noticed the different colours on the pins but not sure what the colour coding meant. I clicked and right clicked on the pins but no information was available.
If not a legen then simply a help tip when youclick or hover over the pin would be good.
I did not see any reference to the limitations of SIO pins in the introduction and training videos or the data sheet. The information may be buried away in a section somewhere but as a newcomer you see this device that is "Programmable Silicon": where you can route functions to "any" pin and not aware there are certain exceptions initially.
This is now version "E" of this PCB :) Hope I have everything ok now.
I am using P3 and P15 pins at this end of the device for RTD measurement. Do you know if there is some other limitation that would prevent this from working? (The Excitation current from IDAC is connected to P3.6, this pin also measures the voltage at top of the reference resistor. The remaining 3 wires from RTD go to P3.7, P15.2 and P15.3
I am going to file a CASE on this as its a pretty serious issue that needs
to be addressed.
Dana filed a case for this query. We apologiz e for all the problem which you are facing in designing the board. We will check if we can improve the layout of Creator and add some more information so that in future customer will not face any problem related to hardware feasibility at later stages of development.
Please check the following points to avoid these problems and find a solution before designing the hardware layout -
1) Place all the components which you are planning to include in your project. Assign the required pins.
2) Compile the project or "Generate Application" and Creator will check the feasibility of your design. Creator will also perform the static timing analysis of your design, and you will know the problems in your design well ahead of time.
3) Good part is that you do not need to write even a single line of code to check the problems related to hardware resources, Analog/Digital placement and timing problems.
4) If the project compiles successfully, then you can design your board and after that you can spend time in writting the firmware.
We will check if we can add some more information, to avoid these problems, but best way is to compile project as Creator will perform a lot of design checks and will let you know the results.
Please update the post if you have any other feedback.
- Naman Jain
If the issue related to performance only (selecting different pins improving noice performance etc) it would not be so bad.
I looked at the documents you listed and noted how selection of pins can minimise the number of Analog mux busses used. I only have pins available down theside of the IC starting at pin 51. Though I managed to rearrange them to use only 2 busses.
I also brought out seperate pin for tmeasuring excitation voltage across Rref after reading about the higher resistance paths internally that can exist between the IDAC and ADC mux.
What I have done is taken IDAC output out to the top pad of the reference resistor and then another track from this same pad back to another pin. The track back from other side of the ref resistor is the same length, so the drop across track resistance from top of the resistor should be same as for the bottom and therefore cancel the error cause by track resistance.
Now another issue has raised its ugly head.
I get this warning when compiling.
Info: plm.M0039: The pin named MODE_SELECT(3) at location P0 prevents usage of the high current (2mA) feature of an IDAC. (App=cydsfit)
Is this another bit of information that is described in one of these documents somewhere ? I need a 1mA current source on my IDAC but somehow P0 is interfering with this function even though my IDAC is coming out P3.
Does this mean another PCB layout change to do something with P0? I have a DIP switch connected to it at the moment.
I did not find any warnings in the "Temperature Measurement using RTD document about pins. The only advice I see is that if you use your own hardware, put the reference resistor in series with RTD to lower error.
There should be a warning "Don't try this at home". Or, warning! this project is not as straight forward as it appears, please consult all Cypress documents relating to pins, analog functions, components and hardware considerations before attempting your own project hardware.
Found it, my fault again - pins for high current descirbed in IDAC-8.
I should not have taken the local rep serisouly when he said the beauty of using PSOC is you never have to worry if pin placement is wrong because you can reroute them. But, this does not hold, it depends what components you are using, variants of devices etc. I suppose the device is "MOSTLY" programmable.
The High current pins are around the other side of the device from my Terminals on the board. I need to relay the entire PCB and signals to other items on the board. Suppose I either read all the documents I can find or shuffle pins around in a mock-up design until I can finally settle on a set of pins that suit the functions I want.
Or, only use 255uA for the excitation current.
I think the layout is finally going to work. Though I get a note that one unused pin is being used for internal routing and P0.6 cannot be uses for a certain vref function.
The IDAC is now on P0[6 - High current capability
RTD1 - P0.7
RTD2 - P0.3
RTD3 - P15.3
RTD 4 - P3.7
All the RTD inputs are on the same Analog Bus and IDAC on another