SPI MOSI pulled low

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Anonymous
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 I'm trying to access the SPI block without using the Cypress functions.  I have clk, ssn and mosi working properly.  But the miso line is pulled low as soon as I set the GCTL_IOMATRIX register to either GPIO+SPI or UART+SPI+I2S.  I'm not sure what I'm not doing.  Do I have to explicitly set that pin as an Input in it's GPIO_SIMPLE register or something?

   

Any help on the sequence needed to bring up the SPI block would be appreciated.  I haven't found any examples that include the register accesses.  If you know of any please let me know.

   

Thanks.

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3 Replies
Anonymous
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 I don't see a way to fix it but I made a mistake in the title.  It's MISO that is pulled low.  No way for the original poster to modify or delete a post??

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Anonymous
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To understand how we bring up the SPI block, you can read the source code for CyU3PSpiSetConfig() in [SDK Root]\firmware\lpp_source\cyu3spi.c.
 

   

But if I may ask, why do you need direct register writes to configure the block? The CyU3PSpiSetConfig function is already does what you want.

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Anonymous
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        Thank you. That file should be able to help. The reason I'm doing this is that I want my PC application to read data from the flash over USB when the default bootloader is running. I want to use that data to determine which image to download into the FX3 for USB boot. I know I can download the flash reading image and read the flash but then I have to do a hard reset and the FX3 will start up into default bootloader again then I have to know that this is the device I just worked with and remember which image I want to download. It's a lot of extra steps. I don't see the default bootloader having any vendor requests to read the flash so I am just going to use the default bootloaders memory access request to configure the SPI and read a few hundred bytes from the flash. I'm 80% of the way there and it's not that hard so I think I'll continue on trying to get this working. Thanks again.   
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