Just configure the SPI master to 8 bit data width, and send 4 bytes. Nothe that, when the clock is fast enough, you need to control the slave select line manually (otherwise it might go high inbetween consecutive bytes).
We can send 32-bit data via SPI with the available 8/16bit SPI component by controlling the slave select pin in firmware. To achieve this, place a GPIO pin in the top-design of your project and control the slave select pin of SPI slave component by writing to this pin. Write zero to the pin before tranfering the data and write one when 32 bit data is transfered. I am attaching a code example which will describe the same.
SPI_32_bit.zip 4.6 MB
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Adding to the above mentioned points the SS pin will be active until SPIM_STS_SPI_DONE flag is set. This flag will be set only when the TX FIFO is empty. If you are transferring data continuously to the Tx FIFO at a very fast rate, such that before completing the tranfer of the btye which was written first , if the next byte is written to the FIFO, then SS pin will not get deactivated in between. You can use, DMA for transferring data to SPI TX FIFO.
Hi to all!
Inside the SPI_32_bit.zip file, there is also a SPIM_32bit library that contains a component: SPI_Master32_v2_40.
This is a SPI Master component that works up to 32 bit.
Dear GORE, is this component fully functional?
If this components works (I will test it in the next days), it is possible to include it into new versions of PSoC Creator?
Thank you very much.
Graziano G. Ravizza