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Hello,
I've been creating a circuit that uses a PGA as a differential amplifier with it's reference (V-) input connected to a non-zero reference voltage (call it Vref).
I then convert the PGA output via a DelSig ADC, and the readings are then converted to a temperature.
I noticed that the reading errors (percentage deviation from an expected value) increases as I increase the PGA gain. So at the moment, I'm convinced that the PGA gain is the cause of this.
How then could I correct this error?
I'd love to provide the schematics but I'm afraid I can't.
Some info :
> PGA at Minimum Power, V+ is not changing rapidly (consider it constant)
> ADC is in buffer bypass mode, single sample @ 60 sps, 20 bits, using internal 1.024 reference, differential mode
> Reference voltage is provided by a VDAC buffered with an opamp follower which is in low power mode
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PSoC 5LP
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There are several possibilities.
A basic method is to feed a sample set of test voltages to the PGA, capture
the difference, and do a least squares curve error fit or a power curve fit,
that yields equation coefficients, and future readings are then processed by that
errror correcting equation.
This can be done via GPIB or VMx test instrumnetation during manufacturing test.
A simple cal routine where PSOC controls the forcing generator and performs the
test readings/curve fit.
Or you could do a simple interpolation scheme. Again a test sample set measured,
and the resulting sample set used to interprolate values measured.
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@Hazique
possible reason is that PGA input impedance varies with gain, becoming as low as ~20k range at high G (see the datasheet). So, PGA impedance becomes comparable with e.g. thermistor circuit impedance (e.g. ~10k). Here error comes. Note that Inverting/non inverting PGA have different impedances also.
odissey1
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My guess is that Hazique no longer looking at a 6 month old thread.
The lowest Zin is ~ 10K. The G error is a f() of Zin, onchip R error,
mux Rdson.... Onchip R error is quite significant, + 35%, - 25%, see
TIA conversion R specs.