Anonymous
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Feb 24, 2015
06:51 AM
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Feb 24, 2015
06:51 AM
Dear developer community,
In my recent project I investigate the performance of the PSocs. And now I have some questions to the DSI Routung Interface. Are there any performance data for the DSI for exampel the maximum frequency? And which delays are caused from the DSI? Does PSoC Creator calculate this delays?
Thank you for your effort
Raphael Löffler
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PSoC 5LP
4 Replies
Feb 24, 2015
07:07 AM
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Feb 24, 2015
07:07 AM
If you look at the results tab, workspace explorer, after a build,
there is a file projectname_timing.html that will show you
some timing info.
Regards, Dana.
Anonymous
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Feb 24, 2015
07:10 AM
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Feb 24, 2015
07:10 AM
Thank you a lot for your answer. But I did not found there the spiecial delay from the DSI. And are there any performance data?
Feb 24, 2015
07:56 AM
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Feb 24, 2015
07:56 AM
Feb 24, 2015
08:01 AM
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Feb 24, 2015
08:01 AM
This is a simple example (remember to click on lines to expand detail) -
Static Timing Analysis
Project : | Design93 |
Build Time : | 02/24/15 08:29:57 |
Device : | CY8C4245AXI-483 |
Temperature : | -40C - 85C |
VDDA : | 3.30 |
VDDD : | 3.30 |
Voltage : | 3.3 |
No Timing Violations
Clock | Domain | Nominal Frequency | Required Frequency | Maximum Frequency | Violation |
---|---|---|---|---|---|
CyHFCLK | CyHFCLK | 24.000 MHz | 24.000 MHz | N/A | |
CyILO | CyILO | 32.000 kHz | 32.000 kHz | N/A | |
CyIMO | CyIMO | 24.000 MHz | 24.000 MHz | N/A | |
CyLFCLK | CyLFCLK | 32.000 kHz | 32.000 kHz | N/A | |
CyRouted1 | CyRouted1 | 24.000 MHz | 24.000 MHz | N/A | |
CySYSCLK | CySYSCLK | 24.000 MHz | 24.000 MHz | N/A |
Source | Destination | Delay (ns) | ||||||||||||||||||||||||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
cydff_1/q | Pin_1(0)_PAD | 22.463 | ||||||||||||||||||||||||||||||||||||||||||
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