10 Replies Latest reply on Mar 9, 2015 3:08 PM by user_78878863

    PSoC5LP Power Supply

    jeremy.langford

       I am working on a board that will be using the CY8C5868AXI-LP035 like in the CY8CKIT-050 and I am a little bit confused about the proper way to supply the PSoC properly. I plan on powering the PSoC in unregulated mode so I have done the following.     

       

         

           1.          Short both of the VDDDs and VCCDs bypass each pair with 1uF and .1uF caps.     

       

         

           2.          Short VDDA and VCCA and bypass the pair with a 1uF and .1uF cap.     

       

         

           3.          Bias VDDIO1 and VDDIO2  with VDDD and bypass each with .1uF cap.     

       

         

           4.          Bias VDDIO0 and VDDIO3 with VDDA with .1uF cap.     

       

         

           5.          VSSDs and VSSAs have been connected to their respective grounds.     

       

         

      All of that was fine, but here is where my confusion starts to come in. Should I have separate regulators on my board to supply VDDD and VDDA? Should VSSD and VSSA be their own layers on the board, should they be on the same layer but separated from each other? Should they actually be the same, i.e. shorted together? I have been looking at the schematic for the dev kit and it seems to me like the analog and digital supplies are shorted, but I am not sure. I really don't know what considerations I should be taking to figure these things out. I would really appreciate if I could have some guidance into this.     

       

         

      Thank you,     

       

         

      Jeremy     

       

         

       

         

       

        • 1. Re: PSoC5LP Power Supply
          user_14586677

          First ap note should be of help -

             

           

             

              

             

                    

             

          http://www.cypress.com/?rID=39677     AN57821 - PSoC® 3, PSoC 4, and PSoC 5LP Mixed Signal Circuit Board Layout Considerations

             

          http://www.cypress.com/?rID=40247     AN58827 - PSoC® 3 and PSoC 5LP Internal Analog Routing Considerations

             

          http://www.cypress.com/?rID=39974     AN58304 - PSoC® 3 and PSoC 5LP – Pin Selection for Analog Designs

             

           

             

          Regards, Dana.

          • 2. Re: PSoC5LP Power Supply
            jeremy.langford

             Thank you! The first application note was very helpful.

               

            Also, the TRM stats that the XRES pin is active low restive pull up, I am assuming it is resitive pull up in the same since as the GPIOs can be configured to be restive pull-up meaing that I shouldn't require any external pull up resistors. 

               

            Finally, just to confirm, the XTAL is only required for the RTC or if the IMO is not precise enough, it is not required for the ILO to work for uses such as the sleep timer?

               

            Thanks,

               

            Jeremy

            • 3. Re: PSoC5LP Power Supply
              user_78878863

              Do not short Vdda and Vcca together! Vcca is the output of the internal analog domain regulator, and just needs to be bypassed.

                 

              The PSoC58 family data sheet has an example circuit forall the power connections (figure 2-5), and chaopter 6.2 also explains all the needed connections.

                 

              You can connect the Vddiox pins to whatever voltage you need on the respective outputs, as long as its not higher than Vdda (Vdda needs to be the highest supply voltage in the system).

                 

              Yes, XRES has an internal pull-up (see the pin descriptions in the family data sheet).

              • 4. Re: PSoC5LP Power Supply
                user_14586677

                Finally, just to confirm, the XTAL is only required for the RTC or if the IMO is not precise enough, it is not required for the ILO to work for uses such as the sleep timer?

                   

                 

                   

                That is correct, note its tolerance is -

                   

                 

                   

                 

                   

                 

                   

                Regards, Dana.

                • 5. Re: PSoC5LP Power Supply
                  jeremy.langford

                   This is what I read in the TRM abou the power pins.

                     

                   

                     

                  15.3.1.1 Internal Regulators For external supplies from 1.8 V to 5.5 V, regulators are powered and the supply is provided through the Vddd/ Vdda pins. An external cap of ~1 µF is connected to the Vccd and Vcca pins. For the 1.71 V < Vcc < 1.89 V external supply, power up the device with Vccd/Vcca pins. In this mode, short the Vddd pin to Vccd and short the Vdda pin to Vcca. The internal regulator remains powered by default. After power up, disable the regulators, using the register PWRSYS.CR0 to reduce power consumption.

                     

                   

                     

                  Did I mess up in my interpetation of what it said?

                  • 6. Re: PSoC5LP Power Supply
                    user_1377889

                    Your last post refers to unregulated supply, which means that most of the internal regulators are switched off. This is probably not what you want to use regarding your initial question.

                       

                    Unregulated does not apply to the way you power your device, but is referring to the internal stabilization of the internal voltages. There is a voltage band where the PSoC works, but the internal regulators are shut down which starts at 1.7V and goes up to about 1.8V.

                       

                     

                       

                    Bob

                    • 7. Re: PSoC5LP Power Supply
                      jeremy.langford

                       Ok, I am still confused, maybe some more background on my part can be helpful to help you guys help me. My board will be running on a 1.8V supply and will have separate regulators powering providing power to analog and digital supply planes. The power source for the board will be a battery, so saving power is very important for my design.     

                       

                         

                      I will have some analog circuits on my board as well as a few digital devices in addition to the PSoC that all need to be powered at 1.8V.      

                       

                         

                      I was thinking that since I have the two external regulators that I could power the PSoC with them that way I am not having to worry about supplying the internal regulators on the PSoC and issues with the internal regulators dropping out while the rest of my board is still running. I was thinking that if the internal regulators where meant to supply 1.8V to the chip's internals that it could be problematic if I was trying to supply them with 1.8V due to drop out issues.     

                       

                         

                      This came from http://www.cypress.com/?docID=50920    

                       

                         

                          

                                

                         

                      Unregulated Mode The usual way to power PSoC 3 or PSoC 5LP is in "regulated mode". In this mode voltage is applied to the VDDX pins, and is not directly applied to the VCCX pins. The internal analog and digital regulators are turned on, and their outputs drive their respective domains within the device. To reduce power consumption, PSoC can also be powered in "unregulated mode". In this mode the VCCX pins are directly powered and the analog and digital regulators are turned off. In unregulated mode, the VCCX pin voltage must be from 1.71 V to 1.89 V. The VDDX pins must be tied to their respective VCCX pins, but do not power the VCCX pins with VDDX-level voltages such as 3.3 V or 5.5 V, or the device may be damaged. For more information, see the device datasheet or Technical Reference Manual (TRM). At reset, the regulators are always turned on as a default, and code generated by PSoC Creator does not turn them off. So to reduce the current in unregulated mode you must add code to turn off the regulators; see the TRM for details. Since the USBIOs are powered from VDDD (see VDDIO and Total Chip Power Considerations), and the USB bus does not operate at 1.8 V, you cannot use the PSoC USB feature with unregulated mode.    

                       

                         

                          

                                

                         

                      I read that and it seemed to me like it said that I can power the chip through the VCCD and VCCA pins, turn the regulators off in firmware, and thus save power and still have everything on the board powered by the same digital and analog supplies.    

                       

                         

                          

                                

                         

                       

                         

                      Jeremy    

                      • 8. Re: PSoC5LP Power Supply
                        user_78878863

                        You should have told us about the 1.8V before...

                           

                        In that case, shorting Vcca / Vccd to the Vdd lines is OK (and thats what the TRM says). The internal LDO are providing the 1.79V for internal use when higher supply voltages are used.

                           

                        I think you said in your initial post the Vccd is not connected to Vddd - that would be wrong, they must be connected.

                           

                        Note that still you cannot use any higher voltages for IO. I'm also not sure how much power you really save by doing that - have you calculated that?

                        • 9. Re: PSoC5LP Power Supply
                          jeremy.langford

                           I have connected my VCCDs to my VDDDs and my VCCAs to my VDDAs. Since the whole board is running at 1.8V I don't expect any IO to occour at any higher levels than that.

                             

                          To answer your question about power,I am not sure how much power I would be saving to be honest. 

                          • 10. Re: PSoC5LP Power Supply
                            user_78878863

                            If everything is connected together then you should be fine. If you care about best analog performance, you can route the analog and digital supplies through a ferrite bead before connecting them together.