1 2 Previous Next 22 Replies Latest reply on Dec 19, 2013 6:59 PM by DaKn_263916




      I'm a beginner on PSOC, and i'm trying to understand ADC et DAC components on PSOC Designer.
      Then i put a ADC and a DAC completely opposite for having the same input signal and output signal.
      But after doing all adjustement, I don't get the same signal.
      I need some help

        • 1. Re: ADC-DAC

          If you set ADC resolution to same as DAC you will still have a small


          amout of error between the two readings. Are you comparing binary


          result from ADC or converting to V, same for DAC, then comparing ?


          You have to look at what the read returns on ADC, sign or unsigned,


          reference, and do the converison.




          Post your project archive and forum can take a look at it.


          "File", "Archive Project", do not use chrome to post.




          Regards, Dana.

          • 2. Re: ADC-DAC

            One other contributing factor, if using PGA feeding ADC (from datasheet) -




            The input and output voltage ranges of the amplifier do not extend to the power supplies


            (i.e., they are not "rail-to-rail" opamps). The allowed input range is a combination of input


            limit, output limit, power supply voltage, analog ground value, and selected gain. This is


            illustrated in the DC and AC Electrical Characteristics section.




            Regards, Dana.

            • 3. Re: ADC-DAC

              As an aside you posted in PSOC 3 forum, which uses Creator tool, not Designer.




              If you are in fact PSOC 3 then using ADC with input buffer disabled will give you R-R


              performance. The PGA is R-R in PSOC 3, although allowed inpout swing dependent


              on G you use.




              Regards, Dana.

              • 4. Re: ADC-DAC

                I think I have perfectly configure the PGA and the ADC.But I have some difficulties to configure the DAC, then i just have noise on DAC output.


                Do you have  a few time for consulting my software andtell me exactly where i'm wrong or correct it?


                PS:For the next time, where do you publish my answers?

                • 5. Re: ADC-DAC

                  "PS:For the next time, where do you publish my answers?"




                  Stay with this thread for now.




                  Go ahead and post project archive and Forum will take a look at it.




                  Regards, Dana.

                  • 6. Re: ADC-DAC

                     Here is the project.
                    Thank for your support

                    • 7. Re: ADC-DAC
                      • 8. Re: ADC-DAC

                        The project you posted is incomplete. In Designer go to "File",


                        "Archive Project", and post that zip file.




                        Regards, Dana.

                        • 9. Re: ADC-DAC

                          I hope there is the good one

                          • 10. Re: ADC-DAC

                            Justr started looking at project, change -




                            1) Global properties, upper left window, A_Buff_Power, Op-Amp_Bias to high power.




                            Regards, Dana.

                            • 11. Re: ADC-DAC

                              The DAC data value should be set to offset binary, as you have


                              set the A/D to unsigned.




                              You want to decimate by 32 to achieve 8 bits to match DAC, so


                              set PulseWidth in CAN properties to ( 4*n -1 ), n = decimation rate,


                              so set PulseWidth to 127.




                              Global properties, set CPU_Clock to sysclk/1




                              Regards, Dana.

                              • 12. Re: ADC-DAC

                                Change this line of code to -




                                        if  ( CAN_fIsDataAvailable() > 0 ) {        // attente que la donnée issue du CNA soit prête


                                Regards, Dana.

                                • 13. Re: ADC-DAC

                                  Last change your global properties VC1 to a divisor of 8, so that you


                                  can meet DAC max clock rates.




                                  In general when you place a module, look at datasheet, it covers each


                                  property.  Additionally it covers each API, what it does, and what it returns.




                                  And global properties, always examine those to make sure you are set


                                  up correctly. Same with analog column clocks, they must meet the clock


                                  rate of modules in that column. Adjust VC1/VC2/VC3 for clock rates to compo-


                                  nents that use them.




                                  Regards, Dana.

                                  • 14. Re: ADC-DAC

                                     I do all the changes you ask me to do (thank you by the way).But when I want to digitize at 40 kHZ, I just have noise.
                                    I think there is a problem with the clock of the DAC.

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