The simplest thing would be an ANDgate controlled by a control register to cut the connection between an input and an output.
Another solution is to use the output enable input for the bi-directional pins
The problem is that the signal is bidirectional, so both pins need to be able to drive the other low. If I try cross-coupling AND gates, it creates lateches. I don't think bidirectoinal pins have an output enable option.
This is a longshot. Right now optimizer, even when turned off, is
optimizing out all the Amuxes. I have filed a CASE just to see
what I am missing. The speed of the links is limited by the Comparator,
that has to be taken into consideration. Also speed is impacted by analog
mux series Rdson and stray C. The comp ref should be something like
Vdd / 2, just a pair of equal Rs dividing off Vdd. Also mux Rdson must
be examined in light of pullups used on open drain inputs. eg. noise
Hmm, that's a really interesting solution. I had the same issue with Amux's getting optimized out in a previous project, so it's good to hear I'm not the only one experiencing this. I'll give it a shot when I get the chance.
Partial response from tech support -
The reason is because of the back to back de-mux and mux connected.
The attached simple project will help to understand the issue better.
Here Amux_1 is optimized since it soed not serve any puropse. No matter which channel is selected, Pin_2 data will go to Amux_2.
Since in your original project, all the inputs were demuxed and muxed, all the Amux busses were getting optimized.
I have asked tech support to take a further look.
One way to prevent the optimization is to prevent using back to back AMUX buses. You can connect the AMUX bus output and input to pins and short the pins externally. But the cost is more pins will be consumed.