Certainly a Verlog solution would accomplish this.
Another way would be a DMA process to a control register.
Only usable with PSOC 4 M family, soon to be released.
Some questions -
1) Is your gate destination simple gates like you would implement with
Creator gate components ?
2) Rate you need to do the update ?
3) Need to only update on change ?
4) CPU generated value is under SW control, right ?
5) What triggers the generation of the 8 bit value ?
The control register component could be used as a first approach. You may wire the outputs to your logic and a simple Control_Write() will set all its outputs simultaneously.
Thanks everyone for the reply!
The logic gates are simple gates like AND gate and OR gates that are available in psoc creator.
The CPU must accept values from the ADC. And then perform some operations on the data. After the CPU's job is done, it must send that data to the input of logic gates, perhaps by storing it in a registor wich is accessible by the logic gates for reading purpose.
Level or edge, both types of triggering will suffice.
I just looked at the datasheet of the satus and the control register components in psoc creator.
Unfortunately, I do not quite understand the difference between the two.
As far as I can understand....
1. The CPU can store data in the control registers by calling the ControlReg_Write() function.
2. The input of logic gates can be connected to the control register physically and thus logical operations can be performed continuously on the data present in the control register.
Please correct me if m wrong.
Also, what is the function of the status register?
Can we write the OUTPUT from logic gates to a register, so that the CPU may read it?
Reading logical signals is exactly what the status register is for. The control register is an output while the status register is an input.
Can I re-formulate the question: is it possible to "write" values from CPU to simple logic bypassing use of the Control Register component? For eample, setting bit value directly to an output pin is possible without using ControlReg.
The reason for asking is that each ControlReg consumes one UDB, which may not be a problem for PSoC5, but PSoC4200 has only 4 UDB, and PSoC4000 has none.
For eample, setting bit value directly to an output pin is possible without using ControlReg.
Yes, in code you can set/clear bits, see GPIO section of System Reference in Creator help,
or take a look at -
http://www.cypress.com/?rID=93401 AN86439 - PSoC® 4 - Using GPIO Pins
The control reg does not consume the whole UDB, from datasheet -
Resources The Control Register component uses one control cell in the UDB array
http://www.cypress.com/?rID=69774 AN82156 - PSoC® 3, PSoC 4, and PSoC 5LP - Designing PSoC Creator™ Components with UDB Datapaths