Not quite clear which board you are using, own pcb or a Cypress Kit (exactly which one).
When Cypress Kit, which programmer did you use, I cannot follow your description, might be that you managet to re-program the programming part of the kit.
After programming a BootLoader you need to program the BootLoadable with the provided "BootLoader Host", all others will fail.
Double post by accident
my own board. and everything worked well, until I flashed this project.
alas, I can't try to reprogramm chip with power cycle mode.
maybe, the problem is that I opened project in creator 3.2, but it doesn't support bootloading, so I fall back to creator 3.1
Last chance is to get hands on a MiniProg3. Have you provided the needed connector or can you manage that with your board?
Odd, you are using JTAG if I follow the conversation properly, so
irrelevant whats in the processor memory from prior programming
I would think.
I saw this in site - http://www.cypress.com/?app=forum&id=2492&rID=89011
But then I looked at J-Link support page, PSOC 4 is there....
jlink performs well -- after removing metadata from .hex file.
another question -- is it possible to generate .hex file without cypress specific metadata?
but i think that jlink is not aqcuiring chip as per cypress appnote.
I have psoc5 kit(014), maybe I should port hssp to it?
I saw this today on an available area in the metadata for
user, but nowhere on how to not generate the Cypress
http://www.cypress.com/?rid=110097 Project #029: Supervisory Flash on PSoC 4 BLE