1 Reply Latest reply on Jun 9, 2015 6:43 AM by DaKn_263916

    Lower current in deep sleep


       I have a low powered application using PSOC4200 powered by 3V battery.


      The application has the micro and 2 other ICs on the PCB.


      The other 2 ICs combined draw 12uA. Currently I put the micro into deep sleep and all I need is to wake on an interrupt on a Pin state change. 


      I have measured total current around 60uA, this implies the 4200 is drawing 48uA instead of the 1.3-15uA suggested in the low power guide.


      I do have the LVP enabled as I want to know if battery gets low. IIf this is drawing current then I could stop the LVP int before deep sleep and start again on wake.


      I have SPI being used when wake and also a timer interrupt that is stopped before putting to deep sleep.


      My target is 30uA total for the circuit (around 15-20uA for 4200 would do the trick).



        • 1. Re: Lower current in deep sleep

          Did you try running one of the example projects to see if you could


          eliminate the PSOC.




          I am sure you have seen these -








          http://www.cypress.com/?rID=105694     CE95288 - CapSense Low Power with PSoC 4


          http://www.cypress.com/?rID=78797     AN86233 - PSoC® 4 Low-Power Modes and Power Reduction Techniques




          Discretes like bulk caps not leaky ? No floating pins configed as inputs ? No loads being driven ?


          No pins taken outside rails causing input protection diode current ? No regulator drawing reverse


          current in its output ?






          Regards, Dana.