3 Replies Latest reply on Jul 20, 2015 3:12 AM by user_14586677

    phase and power calculations


      Hi, as an intern student I am new at Psoc 4 and I am stuck with a problem. I have been given a project on home energy monitoring, therefore I have to make some calculations like phase difference, active and reactive power. I want use a shunt resistor with small value to measure the current passing through the system. However, because the harmonics are crucial for power calculations and we want to observe detailed features like "harmonic signatures" of the devices, we want to make like 1000 measurements per second. And the magnitude of the current is expected to be in the range of 10mA-10A.  According to my employer, although the bandwidth of the current is broad, the shunt resistor approach is fine. Until here, everything is okay, but the problem is I am having trouble on these calculations. I know, I should use a SAR ADC to pass the measurements into the digital and maybe a PGA if the current is too low for ADC, but after passing to the digital I do not know how to calculate phase and power. For example, does the fact that I have to measure the current and voltage 1000 times in a minute mean that I should calculate phase and power(both active and reactive) in each time? Or is the phase difference constant as in simple circuits? As an approach, could I find the phase difference by finding when the current and voltage achieve their peak values in a period then by subtracting these values and dividing the result by the line voltage period( 1/50Hz )?


      I know, I asked lots of questions and my writing is a little bit messy. I will be grateful for any help&idea,



        • 1. Re: phase and power calculations
          1. The range 10 mA to 10A, I assume you want a resolution of 1 mA or something like that.

          that means you want ~ a 10,000 : 1 ratio of measurement, so a 14 bit A/D will do OK. So use


          DelSig, that will yield 133K SPS, more than enough.



          1. At each sample point you are getting instantaneous and V values. This ap note might help with the requisite calculations.





          You are going to have to establish a period of the fundamental, that’s nothing more than a zero cross detector. Complicate dby need for AGC loop, or just use the sample set to find the zero cross assuming one period to the next values are stable, or use signal averaging to eliminate chenage in load effects.




          Regards, Dana.

          • 2. Re: phase and power calculations

            Thanks Dana, I have been studying the concepts you mentioned. However, I could not have found a way to implement them. Could you give more details or circuit schematics?

            • 3. Re: phase and power calculations

              The core of the approach is using an A/D converter, there are several example projects


              on Creator Start page, "Find Example Project" link.




              The A/D will measure voltage, and if you insert a low value R in one leg of the load, the V


              drop across that R which indicates current. To get period you can either detect that in code


              looking at your samples, or use a comparator signal conditioned to the AC line, its output


              connects to a timer enable, and you measure the time from start of comparator trip to its


              end, thats 1/2 period.




              Tackle each phase of this 1 step at a time, and google searches will give you many hints,


              references to work from.




              1) Implement A/D, get it working, and measure voltage. Scale the line input to meet


              PSOC limitations.


              2)  Implement comparator and timer to measure period. Use PSOC to generate a frequency


              of your choosing as your signal to measure. Again there are example projects for timer and


              comparator use.


              3) Google measure ac line load, something like that, for methods to measure load current,


              and signal condition that to meet PSOC input limitations.




              PSOC limitations for a signal input are Vdda >= Vinunknown >= Vssa.




              Regards, Dana.