Welcome in the forum.
Did you switch off the debugging capabilities by selecting "GPIO" for debugging pins in the "System"-tab of cydwr-file?
Thanks Bob for the quick reply. I have just tried that and it doesn't seem to have made any difference.
To add further information I have attached a pic of my clocks. I am using the UART module, two interrupts (LPComp12 and WDT), two low power comparators and one opamp. I have tried removing the initialisation code to see if these were problematic but this does not seem to have helped. I also tried adding the relevant _Sleep() commands in.
Can you post your complete project, so that we all can have a look at all of your settings? To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.
There may be confidentiality issues involved with doing that unfortunately. Are there any areas you would be particularly interested in? The code is copyrighted, so I can't include that I'm afraid. Their rules, not mine.
Have you seen these -
http://www.cypress.com/?rID=78797 AN86233 - PSoC® 4 Low-Power Modes and Power Reduction Techniques
http://www.cypress.com/?rID=96072 AN90114 - PSoC® 4000 Family Low-Power System Design Techniques
http://www.cypress.com/?rID=110007 AN92584 - Designing for Low Power and Estimating Battery Life for BLE Applications
Thanks for the links. I have read through the first one before, and it's the guide I followed in implementing it. I'm not sure, but I don't think you can enter deep sleep from within an ISR? I kept getting the processor locking up when entering from the ISR, so I changed it to a flag check in the main loop. If the flag is set, the flag is cleared and the processor goes into deep sleep on that loop iter. An ISR wakes up the processor from deep sleep and sets the flag if the CPU should sleep. All this works as expected but quiescent current is far too high (though, it does at least change so -something- is going on.)
I tried project AN86233_LPComp and using the Pioneer board I am still getting 1.4mA. I had to make some small modifications, I have attached the project file (this should work with CY8C4247LQI-BL483). This isn't my project but since it has a similar issue maybe it'll help.
I wonder if it could be a measurement error caused by the base board? Or can anyone see an issue with how I have "converted" the project - I just changed device and unlocked pins and it built fine...
I noticed the project wakes up once / sec. A meter measuring in uA and lower range
has a settling time spec, possibly wake up processor every 100 sec to obviate that issue ?
Otherwise you are going to do a complex averaging of sleep and wakeup currents.
One method, if you have a psoc 3 or 5LP board is use it to do a triggered measurement,
would be good to 20 bits, and can handle voltages 100 mV outside rail which enables
sense R in supply lead or ground.
In your project, I see that you have ECO enabled (CYDWR -> Clocks). This is contributing to major part of your current consumption after going to deep sleep.
As you are not using BLE, you can run on IMO (which you are actually running on). Disable ECO in one of the following two ways:
1) Uncheck the box for ECO in CYDWR -> Clocks tab -> Double click on ECO. Rebuild the project
2) Call 'CySysClkEcoStop()' API in main.c, either at start or before calling the deep sleep API.
You may also want to set the VDDD and VDDA voltage to 3.3 V in CYDWR -> Systems tab, if that is the voltage you are working on.
I would also suggest to set the drive mode of the digital output lines to HiZ when not in use, specially LED.
I am using a precision 6.5 digit bench multimeter to do the measurement which takes an average measurement over several seconds. I did also try disabling all wakeup interrupts which did not seem to make any significant difference to the power consumption so I do believe the power usage is primarily due to the deepsleep mode using too much power.
Thanks for the information. I will try that later tonight and update.
Please note, the project file I have uploaded is one from Cypress code examples, it is not my exact project but shows the same issue with high quiescent power usage after entering deep sleep.
Thanks all for the responses, very helpful.
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I would advise to look at application note AN92584 for low power operation pertaining to BLE:
The BLE device (PSoC 4 BLE/PRoC BLE) have some requirements with respect to clock (ECO/WCO) which have to be handled. As you will see, PSoC 4 BLE has ECO enabled by default, but as you are not using BLE it is not required. You have to either disable it from CYDWR or call the _stop() API for lower power consumption.
Thanks Roit. I do intend to use BLE later on though, although only very infrequently. I presume the BLE module clock can be turned on and off as required.
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You can enable the clocks only when you require BLE and disable other times.
Thanks for the info. By shutting off the IMO, I am now down to 310uA. Looks a lot more reasonable, but is still too high!
I noticed when I brought my fingers near the GPIO pins, the current varied quite a lot. Could this be due to some pin leakage effect, maybe undefined logic? Without creating 30+ pins in PSoC creator, what is the best way to set all unused pins to output drive LOW?
I switched to a handheld meter for measurement. It has a lower resolution, but updates faster. I can see the current increase briefly when the WDT ISR is entered. I'm also making the WDT ISR flash a red LED for 0.5ms which is visible so I know the ISR is working and the processor can enter and exit deepsleep.