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I'm trying to setup a 16-bit DMA transfer to my custom component. I think I have the DMA transferring data properly to a data path A0 register. How do I read the value in A0 from within the verilog code for my component?
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PSoC 5LP
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Again: In the "Component Author Guide" chapter 6.4 you will find the names of the registers to use.
Bob
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Again: In the "Component Author Guide" chapter 6.4 you will find the names of the registers to use.
Bob
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Some useful ref material on DMA -
http://www.cypress.com/documentation/application-notes/an52705-psoc-3-and-psoc-5lp-getting-started-d... AN52705 Getting Started with DMA
http://www.cypress.com/documentation/application-notes/an84810-psoc-3-and-psoc-5lp-advanced-dma-topi... AN84810 PSoC® 3 and PSoC 5LP Advanced DMA Topics
http://www.cypress.com/documentation/application-notes/an61102-psoc-3-and-psoc-5lp-adc-data-bufferin... AN61102 PSoC® 3 and PSoC 5LP - ADC Data Buffering Using DMA
http://video.cypress.com/video-library/search/dma/ Videos on DMA
https://www.youtube.com/results?search_query=dma+psoc Videos on DMA (some overlap)
Regards, Dana.
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I think the correct answer is: You can not access the accumulator registers (or any data path register) from verilog.
Because the component author guide says:
...a datapath can contain up to 6 outputs regardless of the data width...
These status signals are generated from comparisons and internal logic in the datapath and do not include data bits directly from the registers or the ALU. It is possible however to access this information by using the shifter to serially shift out the bits in the ALU.