Your view of how SPI works is not quite correct:
For every bit (byte) the master sends a bit (byte) is immediately returned by the slave. So it is not a bad idea to make them both > 20.
You clobber your sram by initializing your buffer from 10 to 20 since that does not exist.
You defined an interrupt handler, but in the SPI component no interrupt is enabled.
Your programs are very difficult to read, your indentation does not follow the program structure and I can see only very few comments. When you improve that it can be much easier for you to find bugs.
Thanks for your valuable advice.
I succeeded to make it work and now two psoc talk through spi.
I have another issue: How to manage master spi talk with two slave.
Could you please, look the screen capture of block diagram slave and master let me know that I doing it in right.
SS_A and SS_B digital pins set resistive pul up and initial state high (1).
To multiplex two signals you need only one bit of the control register, not two. In SPI datasheet section I/O connections, ss pin are two examples on how to manage more than one ss-line.
Thanks for giving your time.
I fixed it. For slave SPI used multislave macro where miso_oe connected to miso pin and ss for input digital pin.
On master side I connected two digital input pin and write 0 and 1 to choose slave when need to read.
Thanks in advance for giving your time!
Hi, I am working on SPI communication between 2 psoc which is similar what you have done here.
Can you please share your project both master and slave here?