6 Replies Latest reply on Aug 28, 2015 8:37 AM by DaKn_263916

    PSOC4 TCPWM overflow and compare output pulse too short to trigger PWM (UDB) block ?





      I have created a project where I am using the overflow (or cc) output of a TCPWM block to trigger a PWM (UDB) block via it's trigger input.


      It is not however working.  I believe this is because the output pulse of the TCPWM block, as the datasheet states is only 2 SYSCLK cycles wide, which I have confirmed on an oscilloscope. 


      The PWM block that requires triggering is running from a 100kHz clock and I am guessing that because a clock cycle for this block is much slower than the output pulse of the TCPWM block, that it does not see it.


      To overcome this, I have added a PulseConverter block which converts the two SYSCLK cycle pulse into a 100kHz pulse and all works correctly.


      Am I missing something ? and is the PulseConverter module the right way of overcoming the problem or is there another way that doesn't use up extra UDB blocks.


      Any help gratefully appreciated.


      Paul H