2 Replies Latest reply on Sep 24, 2015 11:05 PM by keerthi.gowda

    ADC change mode problem

    user_418833836

      I tried to change the modes of the ADC via firmware.
      code:

         

      void SetADCMode (enum sar_mode mode) {
      uint32 reg_sar, reg_sample;
      reg_sar = CY_GET_REG32 (CYREG_SAR_CTRL);
      reg_sar & = ~ 0x00000EF0;
      reg_sample = CY_GET_REG32 (CYREG_SAR_SAMPLE_CTRL);
      reg_sample & = ~ 0x00000004;
      switch (mode) {
      case vref: //
      reg_sar | = 0x000002C0;
      reg_sample | = 0x00000004;
      break;
      case vref2:
      reg_sar | = 0x00000EC0;
      break;
      case vdda:
      reg_sar | = 0x00000270;
      reg_sample | = 0x00000004;
      break;
      }
      CY_SET_REG32 (CYREG_SAR_CTRL, reg_sar);
      CY_SET_REG32 (CYREG_SAR_SAMPLE_CTRL, reg_sample);
      CyDelay (5);
      }

         

      And I received false readings ADC.The project is built with the ADC configuration as shown in Figure 1.
      +[0] 1A -+[1] 1A -+[2] 1A -+[3] 1B -+[4] 1A -+[5] 1B -+[6] 1A -+[7] 1A -+[8] 1A -+[9] 1A -+[10] FFFFF856 -+[11] FFFFF896 -+[12] FFFFF8BF -+[13] FFFFF8CA -+[14] FFFFF908 -+[15] FFFFF91C -+[16] FFFFF920 -+[17] FFFFF922 -+[18] FFFFF922 -+[19] FFFFF922 -+[20] FFFFFA09 -+[21] FFFFF988 -+[22] FFFFF93F -+[23] FFFFF8D7 -+[24] FFFFF8B9 -+[25] FFFFF876 -+[26] FFFFF84A -+[27] FFFFF83E -+[28] FFFFF800 -+[29] FFFFF800 -