6 Replies Latest reply on Sep 23, 2015 10:30 AM by user_246598725

    psoc 4100 Vdd

    aleksandr.federyakin

      Hi. I have a few cy8c4124pvi-432. If the Vdd (=Vccd) voltage exceeds 4.5 V they burn! What am I doing wrong? Please help!

        • 1. Re: psoc 4100 Vdd
          user_246598725

          Hi psix,

             

           

             

          without knowing your circuit it's hard to give help. Please post your circuit.

             

           

             

          Regards,

             

           

             

          Ralf

          • 2. Re: psoc 4100 Vdd
            aleksandr.federyakin

            2 wires from power supply. 1st to Vdd and Vccd, 2nd to Vss. 4.55V = 3.6A and burn. (at 3.3V = 0A, chip works ok)

            • 3. Re: psoc 4100 Vdd
              user_14586677

              The part is rated at 6V absolute max. From the datasheet -

                 

               

                 

              Unregulated External Supply
              In this mode, the PSoC 4100 is powered by an External Power
              Supply that can be anywhere in the range of 1.8 to 5.5 V. This
              range is also designed for battery-powered operation, for
              instance, the chip can be powered from a battery system that
              starts at 3.5 V and works down to 1.8 V. In this mode, the internal
              regulator of the PSoC 4100 supplies the internal logic and the
              VCCD output of the PSoC 4100 must be bypassed to ground via
              an external Capacitor (in the range of 1 to 1.6 µF; X5R ceramic
              or better).

                 


              VDDA and VDDD must be shorted together; the grounds, VSSA
              and VSS must also be shorted together. Bypass capacitors must
              be used from VDDD to ground, typical practice for systems in this
              frequency range is to use a capacitor in the 1 µF range in parallel
              with a smaller capacitor (0.1 µF for example). Note that these are
              simply rules of thumb and that, for critical applications, the PCB
              layout, lead inductance, and the Bypass capacitor parasitic
              should be simulated to design and obtain optimal bypassing.
              An example of a bypass scheme for the 44-TQFP package
              follows.

                 

               

                 

              I think your VCCD should have been bypassed, as its an internally

                 

              regulated supply.

                 

               

                 

              Regards, Dana.

              • 4. Re: psoc 4100 Vdd
                aleksandr.federyakin

                I feel myself so stupid... Now it works fine. Thanks very much indeed! 

                • 5. Re: psoc 4100 Vdd
                  user_14586677

                  Welcome to my club :), glad to have helped.

                     

                   

                     

                  Regards, Dana.

                  • 6. Re: psoc 4100 Vdd
                    user_246598725

                    Aaaaah, sorry, I didn't think about the two power supply modes. My fault.

                       

                     

                       

                    Regards,

                       

                     

                       

                    Ralf