The principal concern is that no signal connected to PSOC can exceed
its power rails. So as long as no transient occurs that tries to take a
pin below Vssd or > Vddd you should be OK. Of course the code base
has to handle an interface that is no longer meeting specs. You may want
to detect in HW and code that the interface is no longer powered properly.
You also have to be concerned about brownout types of failure, eg. if you
have an externally generated logic signal that is connected to a PSOC input
pin that it does not "hang" around the threshold point of the CMOS input and
initiate large currents thru the totem pole input structure of CMOS. One more
reason that PSOC, if it detects low power to external circuits, should shut off
completely the external circuits, eg. controlling a power MOSFET to gate
power on and off.
Hey, thanks for the quick answer.
What about the collapsing of one of PSOC VDDIO rails itself? Would the PSOC continue to work if no other rails collapse? Would a brownout condition be generated for one particular VDDIO section?
What about the collapsing of one of PSOC VDDIO rails itself? Would the PSOC continue to
work if no other rails collapse?
Yes it will work fine if you take a Vddio to 0 V, obviously that port becomes non functional
for Data I/O.
Would a brownout condition be generated for one particular VDDIO section?
You have to do the detection circuit/code to handle the fault on an I/O port, the PSOC does not look
at Vddio to test brownout, it looks at Vddd and Vdda.
Glad to have been helpful.
just one additional note: if I remember correctly, port P12 is specially designed for hot-plugging etc. Maybe this will help you in your design.