4 Replies Latest reply on Oct 8, 2015 10:38 PM by gepec_349106

    SPIS Example ( DMA ) STA violation at 66 MHz MASTER CLK



      I am playing with the SPIS example, created by Creator 3.3 for PSoC 5.


      It compile without problems at 24 MHz MASTER / BUS CLK




      If PLL is changed from 24 to 66 MHz ( to increase CPU speed ) STA M0019 warnings are reported.


      It looks like SPIS to DMA interrupt connection timing problem.


      Is there a way around this, and still have full CPU speed ?




      SPIM Example doesn't seem to have this problem ?