Geert, can you upload your non-working example here so that we all can have a look at all of your settings? To do so, use
Creator->File->Create Workspace Bundle (minimal)
and attach the resulting file.
How do you generate the clock for the SPIM component? make sure its not higher than the maximum support frequency for this component (look at the data sheet - its 36MHz at most).
Well, it is the SPIS example provided by Cypress.
PLL_OUT is changed from 24 to 66 MHz to get higher CPU speed.
It is just compiled, not run on any hardware.
Please find it attached
I have now run the SPIS example on a CY8CKIT-059 board @ 66MHz, and it seem to work, despite the STA warnings.
However I still think it is odd to get warnings in this example.