Have a look at the External Memory Interface (EMIF) component for PSoC3 and 5. When that is usable for you... Needs a lot of pins.
Thanks for the quick reply. If you don't mind I have another question.
What kind of ram should I use or could you point me in the right direction to figure that out for myself? I would like it to act as normal to the sram as possible, it states the EMIF supports synchronous SRAM, asynchronous SRAM, cellular RAM/PSRAM, and NOR flash.
I'm guessing I probably should be looking at either synchronous SRAM or asynchronous SRAM, and coming from basic theory I know synchronous is generally a better way to go, but I know asynchronous is easier. My main concern is the ability to properly perform the in place FFTs on the external SRAM.
any input on this would be appreciated
the decision should be made upon speed needed and if the data has to be stored even when the device is powered down.
If it has to be stored, you should use either a battery-backup solution for the (S)SRAM or a cellular / PSRAM.
If it doesn't have to be stored, you can either use a synchronous or asynchronous SRAM. If you need (really) fast speeds, you'll have to use synchronous SRAM - however, then you also might need a special PCB layout.
So, I think the first thing to be done is to place some 'pseudo' ADC values in code space to check how long the device needs for one calculation cycle for a single channel.
After that, you can decide if a asynchronous SRAM will be enough (I assume synchronous RAM is more expensive).