6 Replies Latest reply on Dec 18, 2015 12:13 PM by j.ortunogonzalez.1994_1446731

    CRC Component

    j.ortunogonzalez.1994_1446731

      Hi:

         

      For several reasons, I have to calculate the CRC of a large array,1024 Bytes, as quickest way possible, so...

         

      I had read a little bit of how to get the CRC value, using the fastest way. And of course I read: A painless guide to CRC error detection Algorithms, from Ross N. Williams, just to comprehend what is happening in the CRC calculation procedure. I am using a table based method, with the simple CRC-16-USB poly, courtesy of PyCRC Generator; Nevertheless, this method is still slow for a high speed interrupt system that I am planning implement. 

         

      So right now, I search example projects of the CRC component in PSoC 4 Forums, but there are too few examples. What I understand about this component is that you need a serial input and a data clock in order to get the CRC component to read the bits from your data Byte, or all the bits of the array on this case. So I am using a SPI Master  digital component, just to send fast the data from the firmware to the CRC component,  first using the SPI Master API: SPIM_PutArray();, and then I checkinf the CRC value using: CRC_ReadCRC() API ;. Finally I compare the software table driven CRC and the Hardware Method CRC. But the hardware method is wrong, and is worst the CRC value is changing every time I read it... I think that I am making several mistakes in the SPI send configuration, or maybe I am misunderstanding some of the CRC parameters configuration. 

         

      I would thank any advice that you can bring me...

         

      Martin

         

      P.S. I am attaching my example project.

        • 1. Re: CRC Component
          user_78878863

          The CRC component samples data with the rising flank of the clock. Your SPI master is configured to change data at the rising flank of the clock, so it would need to be sampled with the falling flank. Change CPHA to 0.

             

          It might be that you need to change the seed value to match what your program does, too.

          • 2. Re: CRC Component
            j.ortunogonzalez.1994_1446731

            Hi:

               

            Thank you for your quick reply...

               

            I tried to change CPHA to 0 but is just the same result, with the same old issue. Finally concerning the seed value, and please correct me if I am wrong, I think that is fine 0x0000 because this seed value represent the initial value of the CRC, and in this CRC model the initial value is 0x0000. I don't know what else could be wrong...

               

            I will appreciate any advice that you could bring me

               

            Greetings

               

            Martin 

            • 3. Re: CRC Component
              user_78878863

              With the correct clock phase, do you still get different CRC values? As long as this happens you cannot trust the results. Maybe read the CRC and SPI data sheets (and look at the SPI config) to make sure they agree in how the interpret the signal...

              • 4. Re: CRC Component
                j.ortunogonzalez.1994_1446731

                Well...

                   

                The solution that came to my mind a while ago is to reset the seed value to its original value 0x0000, using the API: CRC_WriteSeed(0x0000); , and with this little change the CRC value is always the same. So I am sure that the value is the same, but it is wrong anyway. 

                   

                And concerning the clock part, I've read the CRC datasheet, and according to the information provided, and as you said already, in the single cycle implementation mode, each clock's rising edge the crc is going to take one bit, and hopefully, the SPI sclk is going to provide this signals with every bit sent. So relying on this fact I think that they "agree" in how to interpret the signal...

                   

                Anyways, I am going to check deeply the SPI's clock configuration, but please tell me if any of you find my mistake...

                   

                Thank you

                   

                Martin

                • 5. Re: CRC Component
                  user_78878863

                  When you now get the same CRC always, I think the hardware part is OK.

                     

                  This page http://reveng.sourceforge.net/crc-catalogue/16.htm#crc.cat-bits.16 gives a list of algorithms, and the checksum for the string '123456789'. Maybe this helps to find the algorithm that the CRC component actually calculates (it seems as if the component does not allow all of the configuration CRC normally uses)

                  • 6. Re: CRC Component
                    j.ortunogonzalez.1994_1446731

                    Thanks I am going to have to check each value...

                       

                    Greetings

                       

                    Martin