1 Reply Latest reply on Jan 12, 2016 7:36 AM by scott.carlson

    How to populate 32-bit array on EMIF using DMA

    scott.carlson

      Hi,

         

      I've successfully integrated EMIF into my project which contains a data stream coming in via SPI among many other things.   

         

       

         

      The SPI data coming in is 32-bit, so I am using a DMA to facilitate the creation of 32-bit values in the internal sram.  I have also tested the EMIF_Example project and configured it to 32-bit transfers, where the source is incremented (src incrementation is default for the example) and have verified it works this way.

         

      What I want to do is use a second DMA to transfer the result the DMA creating the 32-bit values makes onto the external sram.  In this case I would not want source incrementing. 

         

       

         

      The problem I am facing is the emif component does not seem to work properly when I increase the burst count to 4 (for 32-bit transfer, it is 1 for 8-bit tx by default in the example).  It only transfers the first and 3rd byte properly, the second and fourth byte are either corrupted or not transferred.  

         

       

         

      Attached is both my project and below is my google sheets for received data from the external sram via the emif component.  SendData is the original correct data, ReceivedData is the data on the sram.

         

      The data points: https://docs.google.com/spreadsheets/d/1QUtSaZzsetq-DZz1eQH9XXWUm8FNalx63D9bqPaOUoE/edit?usp=sharing

         

       

         

      Any help would be greatly appreciated, this is the last step of a critical stage of my design, without this I cannot move forward.

        • 1. Re: How to populate 32-bit array on EMIF using DMA
          scott.carlson

          So I think I may have found out my problem,

             

           

             

          I am using 8-bit SRAM, and the DMA spoke width for EMIF is 16 bits, so when I initiate a transfer using burst count=4bytes the DMAC tries to send out the data in two 16-bit increments, and while the spoke can transport this, I believe the EMIF is only seeing the first 8-bits of the data on the spoke.  I will be ordering a 16-bit SRAM soon to test this out.  

             

           

             

          I will post what I find after I test out the 16-bit sram.

             

           

             

          -scarlson