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Hi,
- When compiled and configured AN91162 e'thing worked.
- Instead of PrISM, want to have my own functionality. That functionality being timing critical has been written in verilog and a custom component is created.
PLD Packing Summary
------------------------------------------------------------
Resource Type : Used : Free : Max : % Used
====================================================
PLDs : 4 : 4 : 8 : 50.00%
- Later, I combined 2 cases mentioned above.
- So that I can control my custom component through same scheme instead of PrISM and the LEDs.
- But now, the PLD resource utilization has jumped to 225%
- Error: mpr.M0014: Resource limit: Maximum number of Pre-configured Blocks exceeded (max=4, needed=9). (App=cydsfit)
Solved! Go to Solution.
- Labels:
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BLE
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This sounds like a question for Cypress. So maybe create support case ('MyCases' in the top right menu), attach the project and ask them. It would be nice if you tell us the answer afterwards 🙂
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This sounds like a question for Cypress. So maybe create support case ('MyCases' in the top right menu), attach the project and ask them. It would be nice if you tell us the answer afterwards 🙂
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The problem was at my end. Cypress guys correctly pointed-out in the support case.
The "custom component" when I had tried stand-alone : Few primary inputs were hard-coded to 1 / 0 etc. That lead Cypress synthesis tool to optimize my RTL and made it "fit" in available PLD / UDB .
In integration time with BLE, these inputs are to be driven by Control Register which is written by data received over BLE. This time, Cypress synthesis tool (obviously) doesn't optimize my RTL and exceeds the available PLD / UDB !