The DFB component uses 3x8 bit reads/writes to access the staging and holding registers in
void DFB_1_LoadInputValue(uint8 channel, int32 sample) and
void DFB_1_GetOutputValue(uint8 channel, int32 sample)
Is there a reason for this ? I tested using 32 bit access like
*( (reg32 *) DFB_1_DFB__STAGEA) = inputvalue ;
int32 outputvalue = *( (reg32 *) DFB_1_DFB__HOLDA) ;
This does indeed return correct values from the DFB.
Welcome in the forum, Magnus!
This is a question you ought to ask Cypress directly. At top of this page "Design Support -> Create a Support Case".
Woud be fine, when you keep us informed here in the forum.