There is a possibility of noise when you interface the xilinx board with FX3 which results in PHY/Link Errors on USB. To confirm this, please use the API CyU3PUsbGetErrorCount API in your FX3 firmware periodically to get the phy/link error counts (Refer to API guide for more details on the API).
This issue will not occur if all our schematics and layout guidelines have been followed in your board. If this was the case, some ways to minimise the effect of PHY / Link Errors are:
Either re-work the board layout
(i) Reduce the VIO power domain voltage levels
(ii) Use Clock instead of crystal
(iii) Change the voltage Swing using the SetTxSwing API (Enter Tx swing values by trial and error and find out which one has least effect of noise). Refer to API guide on how to use this API
- Madhu Sudhan
Thank you very much for your answer.
So I fortunatly found out that there is a very simple way to solve my problem: when I cut off the INT#/CTL15 pin everything works fine.