The datasheet lists 18MHz as max clock (see AC characteristics)
You can use DMA to write the data into the TX FIFO. That way no software overhead occurs.
to extend hli's comment:
... when using a PSoC4-M which has got DMA
The device has no DMA and the SPI Hardware is fast enough (8 MHz). The problem is the software access to the SPI. I changed the access to direct register access and so the time for writing to the TX register in the SPI is reduced to 600ns, still 30 clock cyles.
The assembly code is:
//76: CY_SET_REG8(SPIM_1_TXDATA_PTR, SPIFLASH_READ_CMD);
0x0000040C ldr r3, [pc, #68] ; (478 <CYDEV_STACK_SIZE+0x78>)
0x0000040E movs r2, #3
0x00000410 strb r2, [r3, #0]
I would assume it should take only 5 cycles. Is it the case that the accesses to peripherals use the APB bus and not the AHB lite bus and so each access takes more cycles?
Are there other options to speed up the access?
And one other question. If I want to modify the SPI Hardware to my needs, can I use the exiting SPI (as verilog file) or do I have to write the code from scratch? If not where can I get the verilog code of the existing SPI model?
Search for the .v files under the creator folder. Do no need to start from scratch.
What do you need the (very) fast access for? No time??
Thanks I will check the .v files . I have to read out up to 4 audio wav files from external flash memory and mix them together without additional sram for buffering. Maybe I change to a device wih DMA unit.