The flags are controlled by the DMA in the FX3. Their behavior is controlled by how you configure them in the GPIFII designer. For example, the supplied SYNC SLAVE FIFO example sets both flags to monitor the current thread, so in essence they mirror each other. In my application, I am setting Flag A to monitor thread 0, and Flag B to monitor thread 3. They are the only controls that the FX3 has to signal the processor on the P Port, so the P port device must monitor them. It does this by setting the address lines to look at the desired flag. So, my application works like this.
Processor selects the address I assigned to flag a and waits for it to go high.
Data comes into the FX3 from the USB. The FX3 will set flag A high to let the processor know it has data.
Processor clocks data out of thread 0.
Process sets the address assigned to thread 3. It then waist for flag B to go low indicating the FX3 has room to accept data.
Processor clocks data into the FX3, then goes back to monitoring flag a.
The FX3 sends the data to the USB.
So again, all the FX3 can do is set or clear the flags. The device on the P port must watch them and control the rest of the GPIF controls. The FX3 is the slave, the P Port device is the master.
