1 Reply Latest reply on Feb 18, 2016 2:10 AM by keaj

    FX3 Slave Fifo Interface - FIFOADDR pins

    user_51803100

      Hello

         

      Thank you for your help

         

      If I am writing data into the Slave FIFO and I hit the 512 endpoint buffer size is there an auto increment mode whereby the FIFOADDR0 and 1 are internally incremented?  If I keep writing into the same endpoint buffer will my data get overwritten?  

         

      See in our FX2 design we are able to externally just keep FIFOADDR 0 and 1 tied to a 0 but we keep writing data into the FIFO and it internally increments the buffer.  Is this possible in the FX3?

         

       

         

      Regards

         

      Gary

        • 1. Re: FX3 Slave Fifo Interface - FIFOADDR pins
          keaj

          Hello Gary,

             


          In case of FX3 the address lines are pointing to the GPIF II threads not the buffers. A GPIF thread is a dedicated data path in the GPIF II block that connects the external data pins to a socket. EZ-USB FX3 provides four physical hardware threads for data transfer over the GPIF II. At a time, any one socket is mapped to a physical thread. By default, PIB socket 0 is mapped to thread 0, PIB socket 1 is mapped to thread 1, PIB socket 2 is mapped to thread 2, and PIB socket 3 is mapped to thread 3.

             

          The address signals A1:A0 on the interface indicate the thread to be accessed. FX3’s DMA fabric then routes the data to the socket mapped to that thread. Therefore, when A1:A0 = 0, thread 0 is accessed, and any data that is transferred over thread 0 is routed to socket 0. Similarly, when A1:A0 = 1, data is transferred in and out of socket 1.

             

          To enable data transfer between GPIF and USB, a DMA channel needs to be created from GPIF II socket to USB socket. The no . of DMA buffers and size of the DMA buffer is configurable. 

             

           

             

          Regards,

             

          Keerthy