3 Replies Latest reply on Apr 12, 2016 7:40 PM by userc_39184

    CyU3PGpifGetSMState always gives zero.



      I have implemented a Slave FIFO interface between the FPGA and FX3. 


      But it seems like there are some configuration issues. I cannot get the interface working yet.


      When ever I use CyU3PGpifGetSMState() API it always gives zero as the current state. When I check in GPIF Designer, the LOGIC_ONE condition is put in between RESET and IDLE states.


      Therefore, I think I should not get Reset state. How can this happen? Can someone please explain?


      Thank you.