7 Replies Latest reply on Apr 28, 2016 10:30 AM by user_342122993

    PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.

    user_373995786

      Hello,

         

      I have found a problem that I isolated to being an iteration between the timer start / stop and de SAR ADC internal bypassed voltage reference, voltage VDD/2.
      It shows a slow start that is very similar the curve charge of a capacitor, in what appears to be a reinitialization of the voltage reference and it’s bypass capacitor. 
      I used the kit 059 for this example.
      I send my code that demonstrates de problem, the ADC/MUX pin has to be feed with an input that has an dc offset off 2.5 Volts.
      The code has a timer that is programmed to work at 160KSamples per second and to make 4 * 300 samples of acquisitions (fill 4 buffers od 300 samples) and then to stop the timer send the data to serial port in CSV format (program serialChart) and then start the sampling again, by starting the timer automatically. In the program is option ‘q’.
      The problem that I am seeing is that when the timer is restarted the voltage reference start from zero and charges, although the variation of the signal (an amplified microphone in my case) appear correctly summed to the DC charging component of the signal.
      I also send a plot image of 2 microphones to clarify the problem described.

         

      Thank you,

         

      Best regards,
      João Nuno Carvalho

        • 1. Re: PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.
          user_78878863

          Is your timer connected to an external pin? (Or is there any other external signal driven by the timer? Note that on the -059 kit some pins are already used for some purposes) In your image, what is the signal you are measuring? Are you sure its value is constant? (the image doesn't even have a scale, neither for voltage nor for time)

             

          I don't think that there will be any interaction between a timer and Vref inside of the PSoC chip.

             

          Yu say the timer is configured to 160k-samples per second. Does this mean your timer fires 160k times per second? or did you mean the ADC? If nthe latter, how is your timer configured? How did you determine that triggering of the timer correlates with the variations in the ADC readout?

          • 2. Re: PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.
            user_373995786

            Hello,

               


            Thanks Hli,

               

            I will try to explain the problem in a better way.

               

            I reimplemented the code and simplified it to the maximum so that you can see the error occurring, I really think this is a problem with the API because I can’t find any explanation for this behavior and it doesn’t make sense.

               

            In this post I send new code that is much simpler and I send more pictures.

               

            What I’am trying to do in this code:
            -To sample a buffer of 600 samples from an ADC and print to the serial port.
            Each ADC conversion starts with the beat of a timer (the timer counts a period of 22micro seconds and generates a interrupt each time it end the count) This is a very simplified version of what i'm trying to do but this version captures the problem.

               

            This is the working correctly and this works even if I sample manually several times de buffer of 600 samples in a row (send S command from the PC serial monitor to the UART of the 059 kit).

               

            But when I automate the process and sample a buffer and then print to the UART and then sample again it changes the values of the 12 bit ADC sample, it’s like the voltage reference of the ADC is changing while it is sampling and as you can see in the images it goes down and then it goes up slowing like the curve of a charging capacitor.

               

            The Pin of the ADC has a “constant” quiescent voltage or offset voltage of 2.5V  (it’s a microfone amplifier with 2.5V dc offset) the ADC is configured with a range between 0V and 5V (VSS to VDD). It generates value between 0 and 4095 and the meddle point is 2048 corresponding to 2.5 volts.

               

            What I have:

               

            -A Timer in continuous mode that starts at the beginning of the buffer and is stopped at the end of the sampling of the buffer.
            -A SAR ADC 12 bits that samples.
            -A UART that send the buffer data to the PC (serialChart) at the end of each complete buffer sampling.

               

            What I already now:

               

            In manual samplings (Press S) the problem doesn’t occur.
            In successive manual sampling the problem doesn’t occur (because they are slow in terms of period of time between repetition).

               

            The problem occurs when I make cycles of (sampling buffer and send data to the UART), the voltage reference or the value reed by the ADC should be a near constant 2048 and it suddenly goes to 900.

               

            I tried to makes cycles that I only sample (to send to the UART) and then at the end manually send to the UART and the problem doesn’t appear. 
            So it seems that there is a problem when you convert with the ADC after sending data to the UART in the direction of the PSoC to the PC.
            I have tried several things but I have always this behavior.

               

            I like to ask for your kind help.

               

            Note: the image that is more or less a line  (constant value) are the sampling of the buffer two times. The graph that shows a constant value (previous buffer) that when the buffer start goes down and starts slowly going up.  The vertical units of the graph (this is serialchart so isn’t really meant to be a graph) is the value [0 - 4095] sampled from the ADC and you can see the values for the discontinuity/problem in the image. When the graph is constant it has a value near the 2048. The XX axis is the number of the sample, so you are seeing a little less than 1024 samples.  

               

            Thank you,

               

            Best regards,
            João Nuno Carvalho

            • 3. Re: PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.
              user_1377889

              You are generating ~87,000 interrupts per second. Imho that is quite too much, so your results are purely predictable.

                 

               

                 

              Bob

              • 4. Re: PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.
                user_373995786

                Hello Bob Marlowe,

                   

                Thank you for your incite,

                   

                I know I am currently making many interrupt calls a second but the signal of a sinusoid seems to be well reconstructed by the ADC, the only problem is that the midpoint (DC offset of 2.5V) isn’t constant at the begin of a cycle of the sampling of the buffer. And I think that this is orthogonal to the fact that I’m generating several thousands of interrupts a second.

                   

                I could use the technic of debugging the timings of the isr by a toggle of a pin with the oscilloscope and see if the ISR are overlapping or not timed correctly.  

                   

                But following your tip on the reduction of number of interrupts per second, for sampling 4 of audio channels at 22050 KHz at 12bits  I think I could use the Sequencial SAR ADC that has an internal analog MUX on it and use the DMA to copy a interleaved buffer of 4 Channels by 1024 samples to a buffer and then transmitte TX it by UART to the PC.  If I use this architecture I would only have a few interrupt a second at the end of the DMA copy of the buffer.

                   

                But I think I would have the same problem that I currently have with the DC voltage offset not being sampled correctly, and that’s why I made this simple example to show the problem.

                   

                Thank you,

                   

                Best regards,
                João Nuno Carvalho 

                • 5. Re: PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.
                  user_1377889

                  You can be quite sure that there will not be an unwanted interaction between a timer and the SAR. There are too many devices out in the field and no report like yours yet. So best approach for a solution is to step-by-step reduce the project to its minimum until the error disappears.

                     

                   

                     

                  Bob

                  • 6. Re: PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.
                    user_78878863

                    Which board are you using? Did you ever try this with a _constant_ voltage of 2.5V (which doesn't come from your microphone circuit, but e.g. from a voltage divider)?

                       

                    You are using a sample rate of 1Msps, which means the internal reference _must_ be bypassed (on P2[0] according to your project). Did you do that? (the ADC config is correct, but your hardware might not)

                       

                    Also, do you see this interaction only after the first 600 samples, or for each buffer thats filled?

                    • 7. Re: PSoC 5 - Found Possible problem in the Timer API when interacting with SAR ADC voltage reference VDD/2.
                      user_342122993

                      Joao,

                         

                      in my experience, Vdda/2 is very noisy (about 10x) and weak voltage reference compared to Vref=1.024V. I suspect that hw timer causing some voltage spike on Vdda, which propagates to Vref=Vdda/2 and causes the problem. Use 1.024V reference instead.