Since no voltage in a PSoC4 design may be larger than VDDA you will have to connect that at least. So VSSA must be connected too. I do not know whether the other two MUST be connected, but I've never seen a design where those were left floating.
Rule of thumb for all chips: connect all Vcc / Vdd pins, ever. They never should be left floating except the data sheets says you can.
As no deeper explanations on documentation, for curiosity I checked what happens: When VSSA and VDDA are not connected, then you can not even connect programmer SWD/JTAG to the MCU through debug port if these pins are not connected as specified in datasheet. IO power pins VDDD# that are not used at all (the ones used for debug port and USB must be connected) may be left unconnected but the 1uF cap added.
Although I would need more information about the VDDA. I have been filtering the analog through 3rd order low pass filter for removing digital noise from analog power. This approach does not fit with the spec as analog voltage will drop on the filter a little and will be lower than digital. Thus it seems for understanding underlying reasons more info would be needed.