2 Replies Latest reply on May 4, 2016 6:04 AM by zhanghao224_1648011

    Flag shows data exist in EP6, but fail to read it with CyConsole

    zhanghao224_1648011

          Hello everyone!

         

          Thank you for your attention!My firmware sets the EP2 as OUT(from PC side) and EP6 as IN. Also, FLAGA shows whether there are data in 2KB FIFO of  EP2, FLAGD shows whether there are data in 2KB FIFO of EP6.  68013A is connected with an FPGA. The FPGA will monitor the state of  FLAGA and read the data, then write back to EP6.

         

          The problem is, I failed to read the data after sent them.  When I download 2KB data to EP2 with CyConsole. FLAGD shows the FIFO of EP6 is full. I continued to download 2KB data to EP2, the FLAGA is set up, too. It means the FIFO of EP2 is full.

         

          I think the path from EP6 to PC is blocked, while the datasheet tells me the 68013A will package the data and send it to PC automatically. Could you help  to find out why? Thank you very much!

         

       

         

          The attachment is captured by USB-Trace when I send 512KB data 4 times, and fail to read 512KB back.