2 Replies Latest reply on May 12, 2016 5:10 AM by chro_1316281

    PSOC5lp dma and interrupt priorities


      I have looked through quite a few posts and reference documents related to DMA and interrupts but can't seem to find the simple answer.


      Which gets higher priority for memory access DMA or interrupts. I know with interrupts and DMA you can priorities, but are the 2 settings related.


      The reason I ask is that I have a project with high priority time-critical interrupt. Which currently is working good. I am now working on my host connection which will probably be SPI and I would like to do this transfers via DMA.


      I guess the question is if I am running my high priority interrupt and some data comes in over the DMA SPI I would not want my interrupt routine to be blocked by DMA memory access for the SPI receive. Can I just set my interrupt to high priority and my DMA to lower priority and I will be fine?




      Any thoughts or insight?





        • 1. Re: PSOC5lp dma and interrupt priorities

          DMA runs "beside" any interrupts. During the execution of a single assembly instruction there are small time slices where the internal busses of the CPU are not used. DMA happens during these times. So your high responsive interrupt is not affected.


          Because SPI is relatively slow compared to CPU clock there is no need to use DMA for that. As long as your time critical interrupt has got the highest priority it will not get disturbed by another int happening, but will happen within the handler of a lower prioritized handler.





          • 2. Re: PSOC5lp dma and interrupt priorities



            Thanks that was what I was hoping that would be the case, but couldn't tell for sure from the documents.


            I will try just using SPI from an interrupt initially then.


            I was just thinking since the app is a pretty busy one that using the DMA might leave more free CPU cycles. But maybe it won't make much difference.