Could be difficult, because emfile does not have got a DMA receiver. There will be something in your for-loop, at least a write of a buffer to emfile.
Can you elaborate on those questions: Do you need a moving average from SAR- or DelSig_ADC? At what data rate / bit width? How many data points need to be averaged before saving?
I am taking current value from device. I need to average of this current value. Actually not just average also min value, max value, rms etc. My adc is 16bit and sample rate is 43750 sample per sec.
At least can I do a component which takes data from dma and process them(find min value etc...) and send them to an array ?
I was thinking originally that you plan is to using PSoC's SAR_ADC for ~1Ms data acquisition and custom verilog component for averaging only. That can be done (but will eat away ~50% of the PLD). But "RMS & etc." will not fit (multiplication in Verilog is costly).
If your data rate was in ~10ks range, the CPU could handle that for sure. Maybe it can even handle this at ~40ks, which is definitely worth trying first. Hope you don't plan saving all data at full speed, it has to be decimated first, so that external memory could handle that.
At ~40ks speed, the DFB can be used to offload processing from CPU (again, no custom component is required). But it has to be programmed in assembly, which won't be easy. As an example take a look on this original article by Aubrey Kagan in PlanetAnalog (measuring RMS using DFB component and custom assembly code):
or re-post on Cypress website:
Try to re-use / modify this RMS project for your goals. It has RMS portion already, you can use second DFB channel for averaging and min/max.