1 Reply Latest reply on Jul 12, 2016 6:19 AM by userc_39908

    DMA_watermark keep low after few seconds of data transfer (based on AN65974)

          I create a fpga design to write data to fx3 based on AN65974 (Slave fifo).


          IN my Firmware, I use the function as follows- CyU3PGpifSocketConfigure(0, CY_FX_PRODUCER_PPORT_SOCKET, 6, CyFalse, 1);meawhile flagA have been configured as DMA_ready , flagB be configured as DMA_watermark.


          I am able to transfer for a very short amount of time before Flag B remains Low = Buffer Full. oscilloscope both flags go low when the buffer is full but only flag A goes back up to show that the buffer is Not Full. Why does the signal not go back up?


          I also used this implementation- CyU3PGpifSocketConfigure(0, CY_FX_PRODUCER_PPORT_SOCKET, 0, CyFalse, 0);When changing the watermark value from 6 to 0 I had no issues and flag B matched up with flag A .