SoftwareReset persistent cache

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Anonymous
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Hello PSoC community,

   

my task is to transfer 4Byte from my main application into the bootloader.

   

Is it possible to use a 32bit register that is persistent when I call the CySoftwareReset() function. Is there a freely useable 32bit register?

   

To use the eeprom is in my case not a good option.

   

Kind regards

   

Stephan Rölke

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1 Solution
Anonymous
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Not as far as I am aware. There are two application bits reserved for the purpose in CYREG_RESET_SR0 however.

   

My suggestion is that you reserve a uninitialized memory block at a fixed RAM address by means of the linker scripts, and inform the bootloader of its validity using one of the RESET_SR0 bits.

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Anonymous
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Not as far as I am aware. There are two application bits reserved for the purpose in CYREG_RESET_SR0 however.

   

My suggestion is that you reserve a uninitialized memory block at a fixed RAM address by means of the linker scripts, and inform the bootloader of its validity using one of the RESET_SR0 bits.

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Anonymous
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That sounds very interesting I will give it a try. I have found a very interesting Knowledge Base Article.

   

http://www.cypress.com/knowledge-base-article/allocation-variables-absolute-address-ram

   

Kind regards

   

Stephan Rölke

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Anonymous
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That is indeed the general idea. The precise details differ a bit between compilers and the article in question refers to the compiler for the proprietary PSoC1 architecture.

   

In essence you need some mechanism of setting aside a RAM memory block for information sharing, or conversely circumscribing the ranges available for general use by the linker, and then to place your data into the block either through an explicit address cast in the code or something akin to a #pragma directive to locate the variable in a suitable section.

   

In the cases of GCC and IAR compilers for the ARM-based PSoC5LP the first step of the equation consists of writing a so-called linker script (or more likely modifying the default) which informs the linker of the available RAM/ROM ranges and how it is to be parceled out.

   

Good luck!