4 Replies Latest reply on Sep 12, 2016 12:36 PM by knight_camper_1861791

    How to use JTAG EXTEST ?

    knight_camper_1861791

      Hello,

      I'm currently trying to use JTAG EXTEST instruction to characterize a custom component attach to my CY8C5287AXI-LP095 (TQFP 100) without any success

         

      Reading at the BSDL file (CY8C58LPXXX_TQFP100_4JTAG.bsdl) it's written:

         
          

      This CY8C58LPXXX TQFP100 BSDL file supports 1149.1 testing only after two of the following conditions are satisfied:

         
         
          

      1. The JTAG port is enabled.

          

      2. All IOs are pre-configured to drive out fast strong high/low.

          

      JTAG access can be enabled either through programming NV-Latch bits appropriately or through using test-port acquisition protocol. The IOs may be pre-configuration either by writing port configuration registers directly through a test port, or relying on a programmed boot sequence which does that to complete automatically. Testing other IO configurations requires changes to this file and the pre-configured IO configuration.

         
         

      JTAG is enable by default on chip from factory, and I have successfully achieve accessing IO configuration register and output value register (succesfully toggle a LED) through the jtag chain using programming svf file generated adding access to those register.

         

      However after doing so I'm still not able to use Sample/Preload and Extest jtag instruction.
      Does anybody know something I may miss or could provide an example of SVF file achieving this ?

      Thanks