5 Replies Latest reply on Sep 15, 2016 12:09 PM by user_1377889

    PSoC 4200L PWM issue




      I am having an issue with using the UDB PWM component with 48 MHz HFCLK clocking. Since I was using the USB component, I must set the HFCLK to 48 MHz. When building the project, this warning message apperars:




      Warning-1366: Setup time violation found in a path from clock ( clk1m ) to clock ( clkphase ).




      And it indicates the max frequency being only 29.8 MHz.


      Thanks for your help!




      I have attached the project to this post.