2 Replies Latest reply on Sep 25, 2016 5:05 PM by kexu_1593951

    How to customize AN75799 to 32b data and allow download a data block into FPGA?

      I have CYUSB3ACC_005 and Superspeed Explorer Kit, and ZC706. 


      My requirement is to transmit 32-b UVC from FPGA and allow quick download a block of control/calibration data (10 MB+) into FPGA via USB3 when the UVC is idle. 


      After some research my idea is as follows. Would like to check whether it makes sense. 


      1) Change the data width in fx3_uvc.cyfx to 32-bit, add a state machine (DOWNLOAD) to do 2~5. 


      2) Add a INTR_FPGA pin to interrupt the Zynq CPU when the FX3 Firmware has a sub-block of control data in EP0. 


      3) FX3 Firmware moves state machine by CyU3PGpifSMStart(DOWNLOAD_START) state, wait for 1ms. 


      4) Zynq CPU instructs FPGA to control READ pin and read 32-bit data. 


      5) Repeat 2/4 until all 10MB data is transmitted. 


      6) Move state machine to UVC by CyU3PGpifSMStart (START_SCK0, ALPHA_START_SCK0);