Presently,the left and right channels are interleaved with a sample for the left channel first, followed by the right channel in a single FIFO (FIFO 0)
Data interleaving must be set to Interleaved for the I2S direction which requires byte
The issue is not the for left and right, but the second or third pair, or channels 3-6 respectively. Since they have to be moved to/from different FIFO locations like I2S_RX_CHn_F1_PTR and I2S_RX_CHn_F2_PTR which are different for the additional channels. It seems like each pair will need it own DMA. But even the existing USB DMA will be broken by adding channels because the USB_FS will put them all in contiguous memory. Can anyone provide an example of more than 2 channels of I2S with USB?
1 of 1 people found this helpful
Multiple channel audio requires indexed DMA approach. The current DMA architecture of PSoC4L is not suitable for this architecture. you may have to use PSoC5LP for this application.