We do not have any reference examples for VHDL interface. We have VHDL model files which can be downloaded form the link given below:
The address map for x16 mode is provide in the page 11 of the datasheet. Please refer and let us know if you need any clarifications.
Yes, I can read a datasheet thanks. But it doesn't answer my original question. I'm designing a simple interface which will read/write pages of 1024 words, sequentially. How do I map the blocks of data into the address map?