2 Replies Latest reply on Jan 9, 2017 8:12 AM by dablc_1191636

    FX3 Data Transfer Failure after ZLP followed by ERDY


      We are using the FX3 through the GPIF II Synchronous Slave FIFO Interface connected to an FPGA.


      The PKTEND# signal is used to force ZLP to end a transaction.


      We noticed that transfers fail in case ZLP is followed very quickly (for example, within one microframe or 125 μs) by another data packet on the burst-enabled USB IN endpoint operating at Super Speed (as described in KBA90259).


      So we have implemented the workaround from KBA90259 (150 us delay between ZLP and next data packet) and this error situation did not occur anymore.


      However, now we have a similar error that occurs in case ZLP is followed very quickly by a ERDY packet.


      How can we prevent/solve this in the FX3?


      And why is the FX3 sending the ERDY anyway? As far as we know the ZX3 was not in the flow control state.


      The attachment visualizes the problem. The USB analyzer detects an unexpected ‘ERDY transaction’ at timestamp 0:05.290.608. The ZLP is present at timestamp 0:05.290.607