I2S TX_FIFO_0_NOT_FULL sticks at Zero

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cross mob
Yashu
Level 4
Level 4
25 sign-ins First solution authored 25 replies posted

I am performing a simple byte bang routine on I2S Tx-only config on PSoC4

   

I have a tight loop which simply checks the TX_FIFO_0_NOT_FULL and if "1" calls I2S_WriteByte(). Frame rate is approx 21us.

   

It seems to work until I put a CyDelayUs(100) in the loop meaning that a byte bang has not occurred for the next frame time. Then, the NOT_FULL bit gets stuck at "0".

   

I have DMA rqst and all INT sources unchecked.

   

Is this I2S module supposed to hang like this in a byte bang implementation?

   

Also as another test, I tried banging 2 bytes in a row with a double call of I2S_WriteByte() and only one the bytes gets xmitted. I thought this module is supposed to buffer up to four bytes.

   

Also, is there any way to bang 16-bits so not having to worry about a lost byte which will straddle the bytes across the sample period and cause havoc on the output audio... ie, if the I2S is in 16-bit data mode, I want to write the 16-bit value in a single variable so bytes don't get out of sync. Isn't this a 32-bit ARM? Why is this perif only 8-bit intfc?

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4 Replies
himam_31
Employee
Employee
50 likes received 25 likes received 10 likes received

Hello,

   

 

   

Can you please post the project.

   

 

   

Thanks,

   

Hima

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

When using the delay, the byte to send has already moved from the FIFO to the transmit register at the time you are checking for the FIFO status. Therefore the FIFO is empty.

   

I think its best to use the I2S component together with the DMA. That way you don't need the CPU to handle the transfer, its done automatically.

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Yashu
Level 4
Level 4
25 sign-ins First solution authored 25 replies posted

Therefore the FIFO is empty.

   

That's correct. So why is the TX_FIFO_0_NOT_FULL bit stuck at 0?

   

Note: I am always checking this status bit in a tight loop... as I stated in the first post.

   

Of course I will use DMA eventually, but need to determine why this peripheral does not function as described.

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HeLi_263931
Level 8
Level 8
100 solutions authored 50 solutions authored 25 solutions authored

You are right, I mixed this up with a FIFO_EMPTY status. Can you post a (small) project showing this behavior? Otherwise, you always create a support case with Cypress and ask them directly.

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