4 Replies Latest reply on Dec 7, 2016 1:32 AM by user_78878863

    I2S TX_FIFO_0_NOT_FULL sticks at Zero

    cypress_1675071

      I am performing a simple byte bang routine on I2S Tx-only config on PSoC4

         

      I have a tight loop which simply checks the TX_FIFO_0_NOT_FULL and if "1" calls I2S_WriteByte(). Frame rate is approx 21us.

         

      It seems to work until I put a CyDelayUs(100) in the loop meaning that a byte bang has not occurred for the next frame time. Then, the NOT_FULL bit gets stuck at "0".

         

      I have DMA rqst and all INT sources unchecked.

         

      Is this I2S module supposed to hang like this in a byte bang implementation?

         

      Also as another test, I tried banging 2 bytes in a row with a double call of I2S_WriteByte() and only one the bytes gets xmitted. I thought this module is supposed to buffer up to four bytes.

         

      Also, is there any way to bang 16-bits so not having to worry about a lost byte which will straddle the bytes across the sample period and cause havoc on the output audio... ie, if the I2S is in 16-bit data mode, I want to write the 16-bit value in a single variable so bytes don't get out of sync. Isn't this a 32-bit ARM? Why is this perif only 8-bit intfc?