Check for broken trace or bad solder on xres, Vcc and GND.
Static certainly a common cause.
If you have a DSO set it up for signals that meet something like this Vsspsoc - .5 > Vsig or Vsig > Vddposc + .5
and see if you can get triggers. Trigger mode set for normal mode, one of the prior mentioned levels. If
you do have triggers then you have problems with coupling to that pin. Generally ground bounce or capacitive
coupling will be root cause.
You have a charge pump on board, hence a lot of noise generated. Make sure your board layout joins its
grounds close to power entry on the PCB.
Use your DSO on infinite persistence, and look at supply rails while running and when touching
electrodes. See if you can capture any large spikes.
I do not see a .01 uF ceramic disc on output of regulator. That should be close to PSOC Vdd pin.
Also the bulk cap ( 1 uF) on output of regulator should be close to PSOC Vdd pin, and not far from
regulator pin. Read regulator datasheet to make sure you do not have to meet a min ESR for the
bulk cap. Otherwise if it does have this constraint you could have high f oscillations on output
of reg. I also do not see bypassing around the IA. Look at its datasheet for recommendations.
Do not scrimp on bypassing, caps are your friends, generally speaking, concerning power domains.
For bulk caps polymer tants best in class. There ESR vs f curves an order of magnitude better than
Board layout is important to insure ground bounce and noise. Some ap notes attached. They are
not PSOC 1 specific, but principles apply.
PCB Layout2.zip 2.6 MB
Another area of concern.
You have C4, 4.7 uF, connected in series with IC5A input. You
need to check that if power is lost this cap cannot damage the
+ input circuits of IC5A by discharging thru them, I would file a
issue with Analog Devices to get their opinion on that. Show
them schematic and ask about AD623 as well. Less concern
there because parastic structures in output generally can handle
issues like this, but ask.
I found this in datasheet, see below.
Lastly this cap represents significant C load on IA output, you need
to look at its phase margin on IAs AC response. Use A/D spice model
or hand calc this.
And one final. Make sure the charge pump powers up after everything else.
eg pay attention to required power supply sequencing issues. Like when you
yank the battery on the linear reg, will the charge pump cause any issues
elsewhere in design.
Thanks so much for your help.
Tomorrow i will have oscilloscope and i check everyfing.
I will write a response.
I improved schematic. I add capiciators in suplly circuit and C4 for highpass is smaller.
I observed on the oscilloscope, when modul BLuetooth HC-05 is connected, supply voltage fluctuates from 4,5V to 5V.
I think, I demaged PSoC. I can upload program to processor and its all ok. But I dont have any feedback. UARTdoesn't work. Pins doesn't have high state.
Write a testprogram that uses a PWM connected to some I/Os to check pins working.
By the way: There are brand-new Bluetoth Low Energy chips from Cypress, get a development kit here secure.cypress.com/
If you are seeing 1/2 a volt of noise on Vdd of PSOC thats a little too
high, indicates bypassing not effective. Too small bulk cap and .01 uF
ceramic disk not close enough to Vdd pin. Typical noise on Vdd should
be < 200 mV.
Post your schematic and project archive for us to take a look at.
PWM doesn't work. I will buy new PsoC and I check.
I don't have any capiciator close to pin uC. What
What should be the capacitance of the capacitor next to the uC?
test2.Archive1.zip 493.6 K
A "standard" would be .01 uF ceramic disk and a 10 uF
polymer tantalum close to PSOC power pin.
When I add polymer tantalum capiciator 10uF close to PsoC a can't togle power suplly in PSoC MiniProg. And doesn't work progamming with another suplly. What wrong ?
When using Miniprog in power cycle mode the board cannot have any other source
1) Using your scope do a single sweep capture on Vdd, trigger set to say ~ 100 mV, and toggle
Miniprog to see what start up looks like when Miniprog trys to turn on power to PSOC.
2) Double check you 10 uF polymer is not installed reverse polarity.
3) Using a DVM and a bench power supply, and measure the Vdd current. Checking for shorts.
Feel PSOC with your finger to see if its hot.
4) Your board meets the following - (from Miniprog user guide)
5) The MCP1702, if no battery installed, its output will not sink current, right ? Check this in datasheet.
3.5.1 Programming Characteristics
Depending on the programmer capabilities, you can select various protocols. Some programmers
are single protocols, but others allow you to select different protocols. The Device Family and
Device drop-down menus adjust according to the protocol selected and the device to be pro
grammed. It supports the ISSP protocol.
Voltage supplied by MiniProg1 to target board is 5 V and total current supplied by MiniProg1 to the
target board being programmed is 302 mA.
Note Total current supplied to MiniProg1 from the USB port is 500 mA, current consumption is
198 mA. Hence, total current supplied to the target board is 302 mA (difference between total current
supplied and current consumption)
Thanks for replay
I check connection, polarity and its all right.
It working without capiciator 10uF. I think this is too large capacity.
Actualy a have only screen from scopemeter.
IMG_20141231_115124.jpg 1.3 MB
It may be the polymer has such low ESR that it triggers short
circuit protection in Miniprog. I will file a CASE on this to see what
Cypress has to say.
I did find another limitation, for SCL, SDA lines be < 30 pF C loading.
I found the cause of the error.
Programmer caused an error.
Every time during programing i have
Program Finished at 21:52:34
Verification of "Protect Area" is FAILED!
===> Protect Failed
But before update PSoC Programmer i don't have problem with that. Actually i have PSoC MiniProg and PSoC Programmer 3.22.0.
What is wrong?