you can use WDT2, but this 32 bit watchdog timer can´t be used to reset the device, only for interrupts.
The second limitation of WDT2 is, that he can only interrupt on a toggle of a single bit from his 32 bits. That means with WDT2 driven by WCO can only interrupt at 16 seconds or 32 seconds, not at 30 seconds.
Another solution is to use a cascade of WDT0 and WDT1. In this case WDT0 acts as 16 bit prescaler for WDT1.
This means, if you configure WDT0 to overflow at 65535 ( 2 seconds ), WDT1 counts up by one.
You don´t can configure the cascade in Design Wide Resources, you have to use "CySysWdtSetCascade( CY_SYS_WDT_CASCADE_01 );" to configure the cascade of WDT0 and WDT1.
Note that WDT0/1 should be disabled before!
For the WDT APIs, you can take a look at "CyLFCLK.c" in the folder "Generted_Source/cy_lfclk" of your PSoC Creator workspace.
Thank you for your help. I didn't know could use counter 0 as prescaler. That worked out well.