1 Reply Latest reply on Jan 29, 2017 10:46 PM by nisa

    Improve speed rate of CY7C6800

    andregiacomini_1574861

      Hi,

         

      Our system consists on: 

         

      - A control board communicating with PC thought USB, 80MHz FPGA doing the timing, 2x 4-Mbit (256K x 16) RAM

         

      - A Peripheral board driving a scanner sensor and communicating with the control board thought a LVDS network, also 80MHz FPGA, 1x 4-Mbit (256K x 16) RAM

         

      The data is transfered by bulk, the maximum speed is around 3 MB/s, but our target is at least 6 MB/s.

         

      We think that the first step should be looking for the bottleneck of the system to eventually improve its speed.   How could we check out if the CY7C6800 bulk transfer rate is not the bottleneck?

         

      Thanks in advance.

        • 1. Re: Improve speed rate of CY7C6800
          nisa

          I suppose you are talking about TX2-UL. It supports  both FS and. HS, so this part won't be the bottleneck. Please check the associated peripheral on your board to see if the data it self is driven at a lesser rate, also see if the queuing from the host is not the bottleneck. You can try to capture a hardware protocol trace to record the activities on the USB bus, which will give some idea on this.