Please find the schematics of CYUSB3ACC-006 interconnect board. If you look at the difference in the pin count on the FX3 and FPGA side, you should notice that the pin count does not match for J1A of the attached scheamtics. In the schematics, you can alsoi notice that we have left these pins unconnected (we are not actually using it). So, there is no problem with that. We have tested it to work fine, and we have provided a reference document with you can use to test. Please refer section 10: http://www.cypress.com/documentation/application-notes/an65974-designing-ez-usb-fx3-slave-fifo-interface
Thank you. Glad to hear that it's compatible.